Integrated circuit systems have infiltrated their existence into all aspects of human everyday life. For instance, integrated circuit chips are commonplace in many of today's electronic devices, such as, cellphones, portable music players, video game players, notebook computers, televisions and even automobiles.
In particular, radio frequency laterally diffused metal-oxide-semiconductor technology (RF LDMOS), Power MOSFET technology, and radio frequency complementary-metal-oxide-semiconductor technology (RF CMOS) are an important part of integrated circuit chip designs. Unfortunately, RF LDMOS, Power MOSFET, and RF CMOS technologies are subject to Miller capacitance, hot carrier injection, and eddy current problems. RF LDMOS and Power MOSFET technology commonly employ a gate shield to reduce the effects of Miller capacitance and hot carrier injection, while RF CMOS technology commonly employs a radio frequency ground shield to reduce the effects of eddy current to achieve high Q factor values for inductors. Additionally, RF LDMOS, Power MOSFET, and RF CMOS technologies commonly employ a Metal-1 layer to connect the shield to the source region of the field effect transistor through a tungsten plug contact, which incurs additional contact resistance.
Although the gate shield and the ground shield solutions provide some measure of relief from effects, such as Miller capacitance, hot carrier injection, and inductor Q factor degradation, there still remains the problem of additional manufacturing steps to produce such solutions. For instance, RF LDMOS technology commonly requires the extra manufacturing steps of depositing, masking and then reduction etching of the gate shield material, such as a polysilicon and/or a polysilicon/tungsten polycide, to form the gate shield. A low resistivity metal shield is desired for the gate shield, but to form a low resistivity metal gate shield, processing steps such as the reduction etching of the gate material can be difficult for refractory metals, such as tungsten. The extra manufacturing steps required by these methods add to the complexity of the process as well as the amount of time needed to manufacture the final product.
Additionally, RF CMOS technology commonly forms a polysilicon ground shield during gate definition steps but requires the formation of a Metal-1 layer to connect the ground shield to the RF ground/source region through a tungsten plug contact. This connection of the ground shield to the RF ground/source region via the Metal-1 layer and the tungsten plug increases the contact resistance between the ground shield and the RF ground/source region. Since serial resistances are additive, the additional contact resistance at the interface between the Metal-1 layer and the ground shield and the RF ground/source region will only increase the overall resistance of the path. The increased resistance of this path will only diminish the effectiveness of the ground shield.
Thus, a need still remains for a more efficient and low cost alternative to present day RF LDMOS, Power MOSFET and RF CMOS technology fabrication.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.